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january 2003 mon08 multilink user manual ?p&e microcomputer systems, inc., 2001, 2002; all rights reserved f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
purchase agreement p&e microcomputer systems, inc. reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. p&e microcomputer systems, inc. does not assume any liability arising out of the application or use of any product or circuit described herein. this software and accompanying documentation are protected by united states copyright law and also by international treaty provisions. any use of this software in violation of copyright law or the terms of this agreement will be prosecuted. all the software described in this document is copyrighted by p&e microcomputer systems, inc. copyright notices have been included in the software. p&e microcomputer systems authorizes you to make archival copies of the software and documentation for the sole purpose of back-up and protecting your investment from loss. under no circumstances may you copy this software or documentation for the purpose of distribution to others. under no conditions may you remove the copyright notices from this software or documentation. this software may be used by one person on as many computers as that person uses, provided that the software is never used on two computers at the same time. p&e expects that group programming projects making use of this software will purchase a copy of the software and documentation for each user in the group. contact p&e for volume discounts and site licensing agreements. p&e microcomputer systems does not assume any liability for the use of this software beyond the original purchase price of the software. in no event will p&e microcomputer systems be liable for additional damages, including any lost profits, lost savings or other incidental or consequential damages arising out of the use or inability to use these programs, even if p&e microcomputer systems has been advised of the possibility of such damage. by using this software, you accept the terms of this agreement. ms-dos & windows are registered trademarks of microsoft corporation. motorola is a registered trademark of motorola, inc. ibm is a registered trademark of ibm corporation. p&e microcomputer systems, inc. p.o. box 2044 woburn, ma 01888 617-353-9206 www.pemicro.com manual version 1.03 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual iii p&e microcomputer systems, inc. 1 introduction ............................................................................................................5 2 mon08 multilink hardware..............................................................................5 2.1 mon08 multilink power supply ............................................................................................5 2.2 optional oscillator .......................................................................................................... ...............5 2.3 target mon08 connector........................................................................................................ ......6 2.4 ribbon cable ................................................................................................................. .................8 2.5 target power management....................................................................................................... ......8 2.6 parallel port ................................................................................................................ ....................8 3 target mon08 header pinouts .........................................................................9 3.1 68hc908ab ................................................................................................................... ................9 3.2 68hc908ap................................................................................................................... ...............10 3.3 68hc908as................................................................................................................... ...............11 3.4 68hc908at ................................................................................................................... ..............11 3.5 68hc908az ................................................................................................................... ..............12 3.6 68hc908bd ................................................................................................................... ..............13 3.7 68hc908ey ................................................................................................................... ..............14 3.8 68hc908gp................................................................................................................... ...............14 3.9 68hc908gr16 ................................................................................................................. ............15 3.10 68hc908gr4/8 ............................................................................................................... .............16 3.11 68hc908gt .................................................................................................................. ...............17 3.12 68hc908gz .................................................................................................................. ...............17 3.13 68hc908jb1/8 ............................................................................................................... ..............18 3.14 68hc908jb16 ................................................................................................................ ..............19 3.15 68hc908jg .................................................................................................................. ................20 3.16 68hc908jk .................................................................................................................. ................20 3.17 68hc908jl.................................................................................................................. .................21 3.18 68hc908kx .................................................................................................................. ...............22 3.19 68hc908ld .................................................................................................................. ...............23 3.20 68hc908lj.................................................................................................................. .................23 3.21 68hc908mr4/8 ............................................................................................................... ............24 3.22 68hc908mr16/32 ............................................................................................................. ..........25 3.23 68hc908qt .................................................................................................................. ...............26 3.24 68hc908qy .................................................................................................................. ...............26 3.25 68hc908rf .................................................................................................................. ................27 3.26 68hc908rk .................................................................................................................. ...............28 3.27 68hc908sr .................................................................................................................. ................29 4 pc-hosted debug/programming software..............................................30 4.1 p&e microcomputer systems software.......................................................................................30 4.2 metrowerks software .......................................................................................................... .........33 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
iv mon08 multilink user manual p&e microcomputer systems, inc. 4.3 target connection and security dialog ..................................................................................... 38 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 5 p&e microcomputer systems, inc. mon08 multilink 1 introduction the mon08 multilink is an interface cable whose purpose is to allow debug and programming of 68hc08 devices via the mon08 debug port. the mon08 multilink connects the target to the pc via a standard parallel port. some of the features that make the mon08 multilink versatile are: a. software configurable port pin settings for monitor rom entrance. b. works with 2v, 3v, and 5v targets with internal bus frequency ranges from 1mhz to 8mhz. c. automatically detects target internal bus frequency and sets communications baud rate. d. may optionally provide either 2,3, or 5v power @ 125ma to the target via pin15ofthemon08header. e. provides 5v 4.9152 mhz oscillator signal to overdrive target crystal and rc clock circuitry. 2 mon08 multilink hardware 2.1 mon08 multilink power supply the mon08 multilink requires a regulated 9v dc center positive power supply with 1.3/3.5mm female plug. the mon08 multilink derives its power from the power jack located beside the mon08 connector. when the cable is powered up, the green led will be on. if the target is powered, the yellow led will be on. 2.2 optional oscillator the mon08 multilink provides a 5v 4.9152 mhz oscillator clock signal to pin 13 of the mon08 connector. if the target is a 5v system, the user may use this clock signal to overdrive the target rc or crystal circuitry. if this signal is not used, just leave pin 13 of the target mon08 header unconnected. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
6 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink please note that if the target already uses an oscillator as its clock, the mon08 multilink will not be able to overdrive it. the clock should have sufficient drive to be used with a target system even if the target system has an rc circuit or crystal connected. 2.3 target mon08 connector the mon08 multilink requires the target to have a standard 16-position 0.100-inch pitch dual row 0.025-inch square header. the mechanical drawing is shown in figure 2-1 . figure 2-1: 16-pin header mechanical drawing the mon08 connector adopts the standard pin-out from mon08 debugging (as used on different ics boards) with some modifications. the general pin-out is as follows: pin 1 - nc gnd - pin 2 pin 3 - nc rst - pin 4 pin 5 - nc irq - pin 6 pin 7 - nc mon4 - pin 8 pin 9 - nc mon5 - pin10 pin11 - nc mon6 - pin12 pin13 - osc mon7 - pin14 pin15 - vo u t mo n 8 - pin16 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 7 p&e microcomputer systems, inc. mon08 multilink if viewed right-side-up from the rear (open) end of the cable housing, the mon08 multilink header looks like this: figure 2-2: mon08 connector pin location please note that nc designates that these pins are reserved for future p&e use. make sure you do not connect any signal to these lines . the mon4-mon8 signals are software configurable to support connections to different 68hc908 devices. depending upon the device, either the mon4 or mon5 pin is the single-wire communications line (which usually corresponds to porta0 or portb0). the rest of the lines are either no connect or are port lines which must be driven to particular values upon reset. the mon08 multilink software lists the target processor types and their corresponding pin-outs for user references. the software also selects the single-wire communications line according to the target processor type. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
8 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 2.4 ribbon cable the mon08 multilink communicates with the target through a 16-pin ribbon cable with 0.100-inch centerline dual row socket idc assembly (not keyed). the ribbon cable is designed such that the mon08 multilink mon08 connector and the target mon08 header have the same pinout. i.e. the pin 1 of the mon08 multilink mon08 connector is connected to the pin 1 of the target mon08 header. figure 2-3 sketches the connection mechanism (looking down into the sockets). figure 2-3: ribbon cable diagram 2.5 target power management the pc software can be configured to have the mon08 multilink drive 2v, 3v, or 5v power to the target on pin 15 of the mon08 connector. the device power option on the connection dialog specifies the voltage level to source. figure 2-4 shows the device power settings. figure 2-4: mon08 multilink pinout example 2.6 parallel port the mon08 multilink connects to the pc via the 25-pin female parallel port connector. the bios settings for the parallel port should be one of the f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 9 p&e microcomputer systems, inc. mon08 multilink following: spp, normal, standard, output only, unidirectional, at. try to avoid ecp, epp, or ps/2 bi-directional. if a parallel port extension cable is used, the parallel cable connecting the pc parallel port and the mon08 multilink cable must be ieee1284 compliant. 3 target mon08 header pinouts this chapter details the mon08 connector signals according to the individual target mcu types. 3.1 68hc908ab figure 3-1: 68hc908ab family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
10 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 3.2 68hc908ap figure 3-2: 68hc908ap family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta2, porta1 and portb0 are used for entering monitor mode. by default the user may bring these signals out to the target mon08 header. alternatively, the user may pull down porta2 and pull up porta1, and pull up/down portb0 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 11 p&e microcomputer systems, inc. mon08 multilink 3.3 68hc908as figure 3-3: 68hc908as family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.4 68hc908at figure 3-4: 68hc908at family mon08 pinout f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
12 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.5 68hc908az figure 3-5: 68hc908az family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 13 p&e microcomputer systems, inc. mon08 multilink portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.6 68hc908bd figure 3-6: 68hc908bd family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
14 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 3.7 68hc908ey figure 3-7: 68hc908ey family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, portb3, portb4 and portb5 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull down porta1 and portb3, and pull up portb4, and pull up/down portb5 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.8 68hc908gp figure 3-8: 68hc908gp family mon08 pinout f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 15 p&e microcomputer systems, inc. mon08 multilink the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta7, portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull down porta7 and portc1, pull up portc0, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.9 68hc908gr16 figure 3-9: 68hc908gr16 mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
16 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink porta1, portb0, portb1 and portb4 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb0, pull down porta1 and portb1, and pull up/down portb4 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.10 68hc908gr4/8 figure 3-10: 68hc908gr4/8 mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, portb0, and portb1 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb0, pull down porta1 and portb1. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 17 p&e microcomputer systems, inc. mon08 multilink 3.11 68hc908gt figure 3-11: 68hc908gt family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0 and pull down portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.12 68hc908gz figure 3-12: 68hc908gz family mon08 pinout f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
18 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, portb0, portb1 and portb4 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb0, pull down porta1 and portb1, and pull up/down portb4 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.13 68hc908jb1/8 figure 3-13: 68hc908jb1/8 mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 19 p&e microcomputer systems, inc. mon08 multilink porta1, porta2 and porta3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and pull down porta2, and pull up/down porta3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.14 68hc908jb16 figure 3-14: 68hc908jb16 mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, porta2, porta3 and porte3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and porte3, pull down porta2, and pull up/down porta3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
20 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 3.15 68hc908jg figure 3-15: 68hc908jg family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, porta2, porta3 and porte3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and porte3, pull down porta2, and pull up/down porta3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.16 68hc908jk figure 3-16: 68hc908jk family mon08 pinout f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 21 p&e microcomputer systems, inc. mon08 multilink the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. portb0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portb1, portb2 and portb3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb1 and pull down portb2, and pull up/down portb3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.17 68hc908jl figure 3-17: 68hc908jl family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. portb0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
22 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink portb1, portb2 and portb3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb1 and pull down portb2, and pull up/down portb3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.18 68hc908kx figure 3-18: 68hc908kx family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the user must pull up the reset line to target vdd with an external resistor. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, portb0 and portb1 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb0 and pull down porta1 and portb1. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 23 p&e microcomputer systems, inc. mon08 multilink 3.19 68hc908ld figure 3-19: 68hc908ld family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta7, portc0, portc1 and portc3 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc0, pull down porta7 and portc1, and pull up/down portc3 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.20 68hc908lj figure 3-20: 68hc908lj family mon08 pinout f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
24 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, porta2 and portc1 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and pull down porta2, and pull up/down portc1 for clock division. in which case the user does not need to connect these signals to the target mon08 header. 3.21 68hc908mr4/8 figure 3-21: 68hc908mr4/8 family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. portb0 from the target processor is connected to pin 8 of the target mon08 header. portb1 of the target processor is connected to pin 3 of the target mon08 header. together they serve as the data communication lines. the user f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 25 p&e microcomputer systems, inc. mon08 multilink should pull down portb1 with a 4.7k ohm resistor. please note that the mr4/8 is not currently supported by the mon08 cyclone. 3.22 68hc908mr16/32 figure 3-22: 68hc908mr16/32 family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta7, portc2, portc3 and portc4 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portc3, pull down porta7 and portc4, and pull up/down portc2 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
26 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 3.23 68hc908qt figure 3-23: 68hc908qt family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the user must pull up the reset line to target vdd with an external resistor. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1 and porta4 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and pull down porta4. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. please note that the mon08 multilink will calculate the proper trim value for the device being programmed and program this trim value to $ffc0. 3.24 68hc908qy figure 3-24: 68hc908qy family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 27 p&e microcomputer systems, inc. mon08 multilink the user must pull up the reset line to target vdd with an external resistor. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 8, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1 and porta4 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and pull down porta4. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. please note that in stand-alone programming mode the mon08 multilink will calculate the proper trim value for the device being programmed and program this trim value to $ffc0. 3.25 68hc908rf figure 3-25: 68hc908rf family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portb0 and portb2 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
28 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink alternatively, the user may pull up portb0 and pull down portb2. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. 3.26 68hc908rk figure 3-26: 68hc908rk family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. portb0 and portb2 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up portb0 and pull down portb2. in which case the user does not need to connect these signals to the target mon08 header. the clock division is fixed div 4. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 29 p&e microcomputer systems, inc. mon08 multilink 3.27 68hc908sr figure 3-27: 68hc908sr family mon08 pinout the target gnd is connected to the pin 2 of the target mon08 header. the target reset line is directly connected to the pin 4 of the target mon08 header. alternatively, the user may pull up the reset line to target vdd. in which case the user does not need to connect this signal to the target mon08 header. the target irq line is directly connected to the pin 6 of the target mon08 header. porta0 from the target processor is connected to the target mon08 header pin 10, acting as the communications line. the mon08 multilink pulls up this signal with a 10k ohm resistor to the target vdd. porta1, porta2 and portc1 are used for entering monitor mode. by default the user may directly bring these signals out to the target mon08 header. alternatively, the user may pull up porta1 and pull down porta2, and pull up/down portc1 for clock division. in which case the user does not need to connect these signals to the target mon08 header. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
30 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 4 pc-hosted debug/programming software free or low-cost software options for interactively programming and debugging 68hc08 mcus from the pc are available from p&e microcomputer systems ( www.pemicro.com ) and metrowerks ( www.metrowerks.com ). p&es ics08 interface software packages are available at no charge from their web site. metrowerks codewarrior development studio for 68hc08, special edition, is available at no charge from the motorola mcu web site ( www.motorola.com/semiconductors/mcu ). you must register for the license key for this software. note: the user should make sure they have the most recent version of these software kits. the latest updates can be downloaded from the web pages listed in section 4.1.1 latest updates - p&e software and section 4.2.1 latest updates - metrowerks software . 4.1 p&e microcomputer systems software p&es ics08 software packages contain the winide integrated development environment, which pulls together an assembler, in-circuit simulator, flash memory programmer, and in-circuit debugger. the programmer and debugger work with any mon08 hardware interface, including p&es dedicated hardware interfaces. the mon08 multilink is a class v device, and the mon08 multilink is class vii. figure 4-28: hardware selection in p&e prog08sz 4.1.1 latest updates - p&e software the most recent updates of p&es 68hc08 software products are available to download, after a brief registration, at http://www.pemicro.com/ics08. 4.1.2 in-circuit debugger the icd08sz in-circuit debugger uses the pcs parallel port to communicate with the mon08 multilink, which further controls the target 68hc08 device via the mon08 connection. with the icd08sz in-circuit debugger you can load code into the on-chip ram, run code out of ram or flash f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 31 p&e microcomputer systems, inc. mon08 multilink (already programmed by the in-circuit programmer), and set many software breakpoints and a single hardware (meaning in flash) breakpoint. the main advantage of using the icd08sz is that your application runs in real-time at the full bus speed of the processor. figure 4-29: ics08sz debugger screen snapshot debugger features include: ? full-speed in-circuit emulation ? breakpoints with counters on the nth execution ? variables window showing multiple data types ? real-time execution as well as multiple tracing modes ? startup and macro files for automating the debug process ? context-sensitive help for all commands ? support for symbolic register files ? full source-level debugging when connecting to the target, the user will be prompted to make selections from the target connection and security dialog. for more information, please see section 4.3 target connection and security dialog . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
32 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 4.1.3 in-circuit programmer the prog08sz in-circuit programmer is a general-purpose programmer which allows the user to program any 68hc908 device with on-chip eeprom/flash, either from an object file (motorola .s19 format), or byte by byte. figure 4-30: prog08sz programmer screen snapshot when connecting to the target, the user will be prompted to make selections from the target connection and security dialog. for more information, please see section 4.3 target connection and security dialog . the prog08sz is simple to operate: after clicking the contact target with these settings button, if the programmer successfully contacts the target it will ask you for the algorithm you wish to use during programming. select the proper algorithm for the device you are attempting to program. then simply select the s-record object you wish to program using the ss command. now the setup of the prog08sz is complete and you are ready for operations on the target eeprom/flash. you may choose em C erase module to erase the target eeprom/flash. then use bm C blank check module to see if the target eeprom/flash is indeed erased. after that, you may choose pm C program module to program the s-record object into the target. finally, you may use vc C verify crc checksum to verify that the contents are properly programmed in the target memory. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 33 p&e microcomputer systems, inc. mon08 multilink 4.1.4 command line programmer cprog08sz is a command line programmer that allows quick turn-around time for programming target mcus. the user may create a script file to instruct the software to execute specific commands in sequence. please refer to cprog08sz.pdf for more information. 4.2 metrowerks software the special edition of metrowerks codewarrior studio offers absolute assembly and provides debugging capabilities based on p&es programming and debug technologies. 4.2.1 latest updates - metrowerks software the most recent updates of metrowerks codewarrior software is available at: http://www.metrowerks.com/mw/support/download/ default.htm?did=find&vers=cwhc08&submit=find. 4.2.2 metrowerks codewarrior a programming or debug session with the project-based codewarrior ide may be launched by double-clicking on the project name (format is projectname.mcp) from your file storage. starting a new project is a little more challenging, but the tutorials, faqs, and quick start guides are easy to follow and have you building a new project, using pre-built templates, in a short time. (see www.metrowerks.com/mw/develop/ and select codewarrior development studio for hc08 for microcontrollers.) the following example illustrates how to program and debug an m68hc908 mcu from within the codewarrior ide. here are the main steps in programming the flash with codewarrior and starting a debug session. 1. a. launch the codewarrior cw08 software and create a new project, or b. double-click on your project file (projectname.mcp) the project manager window appears. see figure 4-31 . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
34 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink figure 4-31: codewarrior project window 2. click the + sign to expand the sources folder. 3. modify the source file if necessary. 4. click the debug icon (green arrow). the true-time simulator and real-time debugger launches. see figure 4-32 . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 35 p&e microcomputer systems, inc. mon08 multilink figure 4-32: true-time simulator & real-time debugger window 5. select the pedebug pull-down menu and navigate to the appropriate device as shown in figure 4-33 . 6. likewise, in the pedebug pull-down menu, select mode: in-circuit debug/programming. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
36 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink figure 4-33: pedebug pull-down menu the prog08sz attempting to contact target and pass security window appears. 7. select the appropriate class in target hardware type (class vii for mon08 multilink and class v for mon08 cyclone). 8. click contact target with these settings 9. follow the power cycle dialog instructions. 10. click yes in confirm window. ( figure 4-34 ) 11. click yes in erase and program flash window. ( figure 4-35 ) 12. follow the subsequent power cycle dialog instructions as the scripted procedure automatically establishes communications, erases the flash if necessary, and programs the flash. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 37 p&e microcomputer systems, inc. mon08 multilink figure 4-34: confirm window figure 4-35: erase and program flash window at this point, the flash memory is programmed and ready for debug. the true-time simulator & real-time debugger integrates the debugger tools from p&e microcomputer systems in this example. the windows look slightly different between the icd08sz and true-time tools but the same basic debugger (icd08sz) drives both. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
38 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink 4.3 target connection and security dialog the following is an explanation of each part of the target connection dialog. for information on passing security mode, read this topic carefully, and refer to section 4.3 target connection and security dialog . figure 4-36: initial target connection and security dialog box 4.3.1 target hardware type this section of the dialog allows you to select the type of hardware configuration to which you are trying to connect, as well as modify specific protocol settings. note: if you select class v, vi, or vii in the target hardware type selection box, the second section of the target connection and security dialog changes. please refer to figure 4-40 and section 4.3.1 target hardware type for a depiction and description. 4.3.1.1 class of target board there are several different configurations of target boards, and p&es mon08-based applications communicate to each type of hardware a little differently. the options are: f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 39 p&e microcomputer systems, inc. mon08 multilink class i ics board with processor installed. this is the standard and most common configuration of the ics08 boards. in this configuration, the processor is resident in one of the sockets on the ics board itself. the processor can be debugged and programmed in this configuration, and an emulation cable containing all the processor i/o signals can be connected to the users target board. in this configuration, the ics board hardware can automatically power up and down the processor in order to pass security in the simplest fashion. the user has to be sure not to provide power from the target, up through the emulation cable, to the processor pins themselves, when this dialog appears. this is so that the software, when attempting to establish communications, can fully power the processor down. the software running on the pc controls power to the target via the serial port dtr line. this configuration can be specified at startup in the software by using the ics08 command-line parameter; otherwise the software will remember the hardware configuration from session to session. class ii ics board without processor, connected to target via mon08 cable. in this configuration, there is no processor resident in any of the sockets of the ics board itself. the processor is mounted down in the target system. the connection from the ics board to the target is accomplished via the 16-pin mon08 connector. in this configuration, since the ics does not control power to the processor, the user will be prompted to turn the processors power supply on and off. turning off the power supply is necessary in order to be able to pass the initial security mode check and access the flash on the processor. a simple reset is not enough; to pass the security check, you must first force the processor to encounter a por (power-on reset) which requires that the processors voltage dip below 0.1v. once security has been passed, resetting the device or re-entering the software should be easier. this configuration can be specified at startup in the software by using the mon08 command-line parameter; otherwise the software will remember the hardware configuration from session to session. class iii custom board (no ics) with mon08 serial port circuitry built in. in this configuration, the ics board is not used at all. the user must provide a serial port connection from the pc, and provide all hardware configuration necessary to force the processor into mon08 mode upon reset. this includes resets both internal and external to the processor. in this configuration, because the software does not directly control power to the processor, the user will be prompted to turn the processors f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
40 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink power supply on and off. the use will also be prompted to turn power on and off to reset the target processor, as the pc doesnt have control of the target reset. turning off the power supply is necessary mainly to be able to pass the initial security mode check and access the flash on the processor. a simple reset is not enough; to pass the security check, you must first force the processor to encounter a por (power-on reset) which requires that the processors voltage dip below 0.1v. once security has been passed, resetting the device or re-entering the software should be easier. this configuration can be specified at startup in the software by using the nodtr command-line parameter; otherwise the software will remember the hardware configuration from session to session. the class iii selection also applies to use of the ics board with the two-pin blank part programming connector. class iv custom board (no ics) with mon08 serial port circuitry and additional auto-reset circuit built in. in this configuration, the ics board is not used at all. the user must provide a serial port connection from the pc and all hardware configuration necessary to force the processor into mon08 mode upon reset. in addition, the user must include an extra circuit which allows the reset line of the processor to be driven low from the dtr line of the serial port connector (pin 4 on a db9). the following diagram shows the additional connection needed to reset from a db9 serial connector. figure 4-37: additional connection to reset from db9 in this configuration, because the software does not directly control power to the processor, the user will be prompted to turn the processors power supply on and off. turning off the power supply is necessary in order to be able to pass the initial security mode check and access the flash on the processor. a simple reset is not enough; to pass the security check, you must first force the processor to encounter a por (power-on reset) which requires the processors voltage to dip below 0.1v. once security has been passed, resetting the device f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 41 p&e microcomputer systems, inc. mon08 multilink should be facilitated by the above circuitry. this configuration can be specified at startup in the software by using the nodtradd command-line parameter; otherwise the software remembers the hardware configuration from session to session. class v p&e mon08 cyclone connect to target via ribbon cable. allows auto- baud and auto-power. figure 4-38: mon08 cyclone mon08 interface and stand-alone programmer p&es mon08 cyclone is a stand-alone automated programmer and mon08 interface. this unit can be used as a debug and programming interface with p&e software applications on the pc, or it can be pre-programmed and used in stand-alone mode. class vii p&e mon08 multilink cable connect to target via ribbon cable. allows auto-baud and auto-power. figure 4-39: mon08 multilink interface cable the mon08 multilink is an interface cable whose purpose is to allow debug and programming of 68hc08 devices via the mon08 debug port. the f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
42 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink mon08 multilink connects the target to the pc via a standard parallel port. note: if you select class v, vi, or vii in the target hardware type selection box, the second section of the target connection and security dialog changes. please refer to figure 4-40 and section 4.3.1 target hardware type for a depiction and description. also: for the simulator, the /sim08 command-line parameter causes the software to disconnect from the target and enter simulation only mode. for information on passing security mode, read this topic carefully and also refer to section 4.3.5 68hc08 security mode . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 43 p&e microcomputer systems, inc. mon08 multilink 4.3.1.2 class v, vi, vii options if you select class v, vi, or vii in the target hardware type selection box, the second section of the target connection and security dialog changes to appear as below. figure 4-40: class v, vi, vii target and security dialog the options presented to the user are as follows: device type figure 4-41: device type selection box f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
44 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink the device type selection box allows the user to specify what type of hc08 they are communicating with. the dialog will then display the appropriate pinout to be implemented on the mon08 connector, so that the p&e interface can talk to it properly. the values given (1 or 0) are for informational purposes only and are driven by the p&e interface. device power figure 4-42: device power dialog the device power selection allows the user to specify whether the target is 2, 3, or 5 volts, and whether this power is switched/generated by the p&e interface or if it is separately supplied to the target and under user control. if it is under user control, the software will use dialog boxes to ask the user to power the target up and down when necessary (similar to class ii-iv). device clock figure 4-43: device clock selection box the device clock menu allows three options: 1) p&e provides clock to target 2) the target has its own clock (1-32mhz) 3) the target has a slow crystal (30khz-100khz) with pll circuitry. p&e tries to enable the pll to allow programming and debug at higher speeds. baud there is no need to set baud rate for class v, vi, or vii targets, as it is auto- detected from the target. 4.3.1.3 advanced settings dialog the advanced button brings up a dialog which allows the user to set specific protocol settings. the following is an explanation of each part of the advanced f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 45 p&e microcomputer systems, inc. mon08 multilink settings dialog. figure 4-44: target hardware type: advanced settings dialog tpd and tpu timing these timing parameters are mostly designed for class i boards, although the delays are valid for all classes of boards. many of the ics boards and user target boards need time to power down and power up. whenever power is automatically switched off, or is manually requested to be switched off, the software waits for an amount of time equal to the tpd delay time before proceeding to the connection protocol. this is because a board or power supply may have capacitance which holds the power up for a short time after the supply has been switched off, but the supply voltage must reach less than 0.1v before it is turned back on if a power-on reset is to occur. whenever power is automatically switched on, or is manually requested to be switched on, the software waits for an amount of time equal to the tpu delay time before attempting to contact the 68hc08 processor. this is to allow time not only for power to be fully available, but to wait until any reset driver has finally released the reset line. on many ics08 boards (such as the ics08rk, m68ics08jl3, m68ics08jljk, and ics08gp20) the tpu can be decreased to as little as 250ms with no adverse effects. target has reset button (class iii boards only): the software occasionally needs to get control of the target. on systems which are class iii boards with the monitor mode circuitry built-in (including rs-232 driver), there is no means to reset the target to gain control. if the board has a reset button, the software can use this to gain control of the target system. if this option is checked, the software will prompt the user to push the target reset button when a reset of the target system is desired. if the option is unchecked, the software will ask the user to power cycle the target system to achieve a f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
46 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink reset. mon08 cable connection communications type (class ii boards only) this selection box is valid only for class ii hardware configurations using the mon08 cable. it allows the user to specify the sequence that the software uses to power up the ics system. when the software tries to create a power-on reset condition, two events must occur: 1. power of the target mcu must go below 0.1v. this means that the processor can not be receiving power from its power pins, nor can it have a significant voltage being driven on port pins or the irq line, as these will drive the mcu power back through these pins. it is crucial, therefore, to have the ics and the target both powered down at some point in time. 2. the processor mon08 configuration pins, including irq, must be properly driven when the target processor resets to drive it into monitor mode. if these pins are not set up properly before the processor powers up, the processor may start up in user mode. power down ics, ask the user to power down their board, power up ics, ask the user to power up their board this is the default option and should work for most, if not all, ics08/target board solutions. refer to the manual addendum under startup for the settings for a specific ics board. it requires the user go through two dialog stages, and requires more time than simply cycling the power. 1. software automatically powers down the ics. 2. software asks the user to power down the board as follows: figure 4-45: power down dialog 3. software automatically powers up the ics, which configures the processors mon08 configuration pins. 4. software asks the user to power up the board as follows: f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 47 p&e microcomputer systems, inc. mon08 multilink figure 4-46: power up dialog powerdownics,asktheusertopowercycletheirboard,powerupics this option will work for many ics boards as well, but relies on the fact that while the ics is powered off, it will hold the target in reset until it is powered up itself and has configured the mon08 configuration pins. the sequence of events in this mode is: 1. software automatically powers down the ics. 2. software asks the user to power cycle their board as follows: figure 4-47: power cycle dialog 3. software automatically powers up the ics, which configures the processors mon08 configuration pins. 4.3.2 target mcu security bytes one of the steps that is necessary to properly bypass security is to provide the proper security code for the information that is programmed into the part. this holds true even when the part is blank. the security code consists of the 8 values which are currently stored in flash locations $fff6 - $fffd of the processor. the prog08sz flash programming software continually records any changes to these security bytes and stores them in the file security.ini. the information in this file is shared with p&e's in-circuit debugger and in-circuit simulator software, and will appear in the dialog box. this allows the user to specify which security code to use to pass security. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
48 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink this dialog can also be used by the user to manually enter the proper security bytes via the user setting, or to load the security bytes from the same .s19 file which was programmed. the bytes are loaded from an .s19 file by clicking the load from s19 button. ignore security failure and enter monitor mode this checkbox can be used to cause the software to ignore a failure to properly pass the 68hc08 security check. if the checkbox is set, the software will attempt to establish monitor mode communications regardless of the security status. as long as the baud and port are correct, and the device has been properly powered, this will allow monitor mode entry. note that by ignoring the security check failure, you may use monitor mode, but the rom/flash will not be accessible. the checkbox can be set to be checked on startup via the forcebypass command-line parameter, which will cause the software to ignore security check failure. this checkbox can be overridden to be un checked on startup via the forcepass command-line parameter, which will cause the software to pop-up the connection dialog when the security check has failed. note that if a connection is not established for a reason other than security failure, the connection dialog will always appear. 4.3.3 status the status area consists of one status string following the status: label, and seven items which list the state of the last attempt to connect to a target and pass security. the description for these items is as follows: 0 C ics hardware loopback detected: every ics or board which supports mon08 has a serial loopback in hardware which, by connecting the transmit and receive lines, automatically echoes characters from the pc. a valid character transmitted from the pc should be echoed once by the loopback circuitry on the board and once by the monitor of the target processor itself. this status indicates whether or not the first echoed character from the hardware loopback was received when one of the security bytes was transmitted. if the status is n, which indicates that the character was not received, it is most likely due to one of the following reasons: 1. wrong com port specified. 2. the baud rate specified was incorrect (probably too low). 3. the ics/target is not connected. 4. no power to the ics. if this status bit responded with an n, you must correct this before f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 49 p&e microcomputer systems, inc. mon08 multilink analyzing the reset of the status bits. 1 C device echoed some security bytes: the monitor resident in a 68hc08 device automatically echoes every incoming character when it is in monitor mode. a valid character transmitted from the pc should be echoed once by the loopback circuitry on the board and once by the monitor of the target processor itself. this status indicates whether or not the second echoed character from the monitor response was received when one of the security bytes was transmitted. if the status is n, which indicates that the character was not received, or not received properly, it is most likely due to one of the following reasons: 1. the baud rate specified was incorrect. 2. the part did not start the monitor mode security check on reset. signals to force monitor mode may be incorrect. 3. no power to the ics. if this status bit responded with an n, you must correct this before analyzing the reset of the status bits. 2 C device echoed all security bytes: in order to pass security, the software must send 8 security bytes to the processor. the processor should echo each of these eight bytes twice. if all 8 bytes did not get the proper two-byte echo, this flag will be n. reasons for this include: 1. the part did not start the monitor mode security check on reset. signals to force monitor mode may be incorrect. 2. the baud rate specified was incorrect. 3. the processor was not reset properly. check the target hardware type and if you are connecting to a class ii board, check the mon08 cable communication connections type in the advanced settings dialog. 3 C device signaled monitor mode with a break: once the processor has properly received the 8 bytes from the pc software to complete its security check, it should transmit a break character to the pc signaling entry into monitor mode. this break should be sent regardless of whether the security check was successfully passed. if a break was not received from the processor, this flag will be n. reasons for this include: 1. the baud rate specified was incorrect. 2. the processor was not reset properly. check the target hardware f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
50 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink type. if you are connecting to a class ii board, check the mon08 cable communication connections type in the advanced settings dialog. 4 C device entered monitor mode: once the software has received, or failed to receive, a break from the processor, it attempts to communicate with the monitor running on the 68hc08 processor. it tries to read the monitor version number by issuing a monitor mode read. if the processor fails to respond properly to this command, this flag will be n. 5 C reset was power-on reset: if the device properly entered monitor mode (4), the software will read the reset status register (rsr). this read does not affect the security sequence, and occurs purely for diagnostic reasons. the reset status register indicates the conditions under which the processor underwent the last reset. for the software to pass the security check properly, it must first cause the processor to undergo a power-on reset. the software reads the reset status register to determine if the last reset was indeed caused by power-on. the result of the reset status register is indicated in parentheses after the flag value. if the highest bit is not set then the reset was not a power on reset, and the flag will indicate n. reasons for this include: 1. the processor did not power all the way down because power was being supplied to the processor through either the port pins, irq line, reset line, or power pins. 2. the voltage driven on the power pin of the processor did not go below 0.1 volts. 3. the processor was not reset properly. check the target hardware type. if you are connecting to a class ii board, check the mon08 cable communication connections type in the advanced settings dialog. 6 C rom is accessible (un-secured): if the device properly entered monitor mode (4), the software reads locations $fff6-$ffff to determine if the processor passes the security check. memory locations which are invalid or protected read back from the device as $ad. if all bytes from $fff6-$ffff read a value of $ad, it is assumed the device is secure, and the flag value is an n. if all flags 0-5 register a value of y and flag 6 register a value of n, then the reset process has gone correctly except that the security code used to pass security was incorrect. specify the correct security code and try again, or ignore the security failure and erase the device. once you erase a secured device, you must exit the software and restart it in order to pass f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mon08 multilink user manual 51 p&e microcomputer systems, inc. mon08 multilink security. 4.3.4 additional dialog buttons the following buttons are also available: contact target with these settings C this causes the software to attempt to cause a power on reset of the target, and to attempt to pass security with the settings in this dialog. simulation only C this button is only visible in in-circuit simulation. this causes the in-circuit simulator not to use the target and, instead, to do completely software-based simulation. the /sim08 command-line parameter has the same function. halt C this causes the software to terminate and return to the calling environment. 4.3.5 68hc08 security mode monitor mode is a special mode on the 68hc08 device which allows an external host to control the 68hc08 microcontroller via an asynchronous serial interface. this feature allows a host computer to query and modify the state of the processor including to load, debug, and program code. without any protection mechanism, this same feature could be used to read out the internals of the microcontrollers rom. the m68hc08 microcontrollers have a additional built-in mechanism to protect a programmed device from being read and disassembled. the mechanism allows a user who knows the security unlock code to enter monitor mode and access the internal rom/flash. this is often desirable to allow real- time debugging of a programmed device. the icd08sz allows just such functionality. the security mechanism also allows a user who doesnt know the security code to enter monitor mode, but doesnt give them access to the rom. upon failing the security protocol, the rom/flash is removed from the memory map until the next power-on reset, in which case the host has to bypass security again. the advantage of this is that even though any on-chip flash is not read accessible, it is erasable. forgotten what you programmed into your device? the answer is simple: erase it. a device is automatically protected in this manner. the 8 bytes from address $fff6 to $fffd constitute the security unlock code which can be used to pass the security check and get access to the rom/flash. hence, if a user knows what has been programmed into a device, they implicitly know the security unlock code. in order to facilitate passing the security check on a 68hc08 device, the f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
52 mon08 multilink user manual p&e microcomputer systems, inc. mon08 multilink prog08sz software continually records any changes to these security bytes and stores them in the file security.ini. the information in this file is also shared with p&e's in-circuit debugger and in-circuit simulator software. this allows the user to reset the device and still have access to the monitor mode. sometimes the case comes up where the software cant pass security mode. the target connection and security dialog section has a status section which describes the different failures and what to check in each case. the most common reasons for not passing security are: - you are not choosing the proper security code to pass security. - on a power on reset, the device is not powering down to below 0.1 volts. with a class i board (ics with processor), you may be driving the pins on the emulation header while the device is being powered down. this back-drives current through the ports and doesnt let the device fully power down. on other classes of boards, when prompted to power down the device, the supply voltage might not be dropping lower than 0.1v which it must to have a power-on reset. - make sure the target hardware type is set to the proper class of hardware. there are several ways you can specify the proper security bytes: - if you know the programmed security bytes, i.e. the bytes from $fff6-$fffd, you can enter them in the edit box listed user: and click ok(retry). - you can use the load from s19 to specify the s-record file which contains the object information currently programmed into the mcu. p&es software will automatically extract the security information from this file and use it to pass security. once you have specified the s-record file, click the ok(retry) button. - you can erase the device. run the prog08sz application, and when the above box appears, select the ignore security failure option and click ok. use the choose module command to select the appropriate programming algorithm, and select erase module. this should erase the device. you will have to execute the choose module command again before you can access the blank device. note: on some older revisions of silicon, you cant ignore the security failure, and it will bring this box back up every time you click ok(retry). if this is the case, you should obtain the latest silicon revision from motorola. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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